Input buffering requirements of a Systolic Array for the Inverse Discrete Wavelet Transform

The Discrete Wavelet Transform (DWT) is a signal processing technique popularised by its results in data compression. Considerable work has been done in designing novel architectures to perform the DWT, including a systolic architecture designed by the authors, but little attention has been given to the inverse DWT which is needed in applications such as data compression for signal reconstruction. Despite the fact that the inverse DWT is computationally the reverse of the DWT, the hardware design for the architecture is not simply mirrored. Existing designs expect the architecture for the inverse DWT to be a simple follow-on step from the DWT design, however this is not the case. We present one such problem here, showing the FIFO buuering required on the input of the inverse architecture. We show how the size of this buuer can be calculated and compare it to a xed data array implementation. This work is based on our systolic array design and is an integral part of the inverse DWT design we are working on for image and video compression. 1: Introduction We present a problem involved with the design of a systolic array for the processing of the Inverse Discrete Wavelet Transform (IDWT). Many architectures have been presented for the Discrete Wavelet Transform (DWT), including one by the authors, but little attention has been given to the IDWT. This is because the IDWT is the reverse computation of the DWT and so previous designers have expected the design of the IDWT architecture to be a simple reverse of the DWT architecture. Our architecture is designed to use minimal data storage and to process the input data-stream as if it were a continuous-ow of data with no eeective signal end. In this case we do not wish to store the input in an array before processing, rather we wish to read input words one at a time and process them in real-time. We do not present the design of the architecture here, rather we detail one of the problems associated with the inverse architecture, that of buuering required at its input. Without this buuering, data required to reconstruct the original signal has long since passed through the array and hence reconstruction is not possible. Since this buuer is exponential in the size of depth of processing, we brieey mention a comparison of this approach to that of